1. Field of the Invention
The present invention relates to source/drain electrodes and substrates for use in thin-film transistors of liquid crystal displays, semiconductor devices, and optical components. It also relates to methods for manufacturing the substrates, and display devices. Specifically, it relates to novel source/drain electrodes containing a thin film of pure aluminum or aluminum alloy as a component.
2. Description of the Related Art
Liquid crystal display devices are used in a variety of applications ranging from small-sized mobile phones to large-sized television sets with 30-inch or larger screens. They are categorized by the pixel driving method into simple-matrix liquid crystal display devices and active-matrix liquid crystal display devices. Of these, active-matrix liquid crystal display devices having a thin-film transistor (hereinafter briefly referred to as TFT) as a switching element are widely used, because they realize high-definition images and can produce images at high speed.
With reference to FIG. 1, the configuration and operating principles of a representative liquid crystal panel for use in active-matrix liquid crystal display devices will be illustrated, by taking a substrate with a TFT array (hereinafter also referred to as “thin-film transistor substrate”) using a hydrogenated amorphous silicon as an active semiconductor layer (hereinafter also referred to as “amorphous silicon thin-film transistor substrate”) as an example.
The liquid crystal panel 100 in FIG. 1 includes a thin-film transistor substrate 1, a counter substrate 2, and a liquid crystal layer 3. The counter substrate 2 is arranged so as to face the thin-film transistor substrate 1. The liquid crystal layer 3 is arranged between the thin-film transistor substrate 1 and the counter substrate 2 and functions as an optical modulation layer. The thin-film transistor substrate 1 includes an insulative glass substrate 1a, and arranged thereon thin-film transistors 4, a transparent picture electrode 5, and an interconnection section 6 containing scanning lines and signal lines. The transparent picture electrode 5 is made typically from an indium tin oxide (ITO) film containing indium oxide (In2O3) and about 10 percent by mass of tin oxide (SnO). The thin-film transistor substrate 1 is driven by a driver circuit 13 and a control circuit 14 connected thereto through a TAB tape 12.
The counter substrate 2 includes an insulative glass substrate 1b, and a common electrode 7, a color filter 8, and a light shielding film 9. The common electrode 7 is arranged overall the side of the glass substrate 1b facing the thin-film transistor substrate 1. The counter substrate 2 as a whole functions as a counter electrode. The color filter 8 is arranged at such a position as to face the transparent picture electrode 5. The light shielding film 9 is arranged at such a position as to face the thin-film transistor 4 and the interconnection section 6 on the thin-film transistor substrate 1. The counter substrate 2 further has an alignment layer 11 for aligning liquid crystal molecules (not shown) in the liquid crystal layer 3 to a predetermined direction.
The liquid crystal panel further includes polarizers 10a and 10b arranged outsides (on sides opposite to the liquid crystal layer 3) of the thin-film transistor substrate 1 and the counter substrate 2, respectively.
In the liquid crystal panel 100, an electrical field formed between the counter electrode 2 (common electrode 7) and the transparent picture electrode 5 controls the alignment direction of liquid crystal molecules in the liquid crystal layer 3 to thereby modulate light passing through the liquid crystal layer 3. This controls the quantity of light transmitted through the counter substrate 2 to thereby produce and display an image.
Next, the configuration and operating principles of a conventional amorphous silicon thin-film transistor substrate for use in liquid crystal panels will be illustrated in detail with reference to FIG. 2. FIG. 2 is an enlarged view of the essential part A in FIG. 1.
With reference to FIG. 2, scanning lines (thin-film gate interconnections) 25 are arranged on a glass substrate (not shown). A part of the scanning lines 25 functions as a gate electrode 26 to control (to turn on and off of) the thin-film transistor. A gate insulator (silicon nitride film) 27 is arranged so as to cover the gate electrode 26. Signal lines (source/drain interconnections) 34 are arranged so as to intersect the scanning lines 25 with the gate insulator 27 interposing between them. A part of the signal lines 34 functions as a source electrode 28 of the thin-film transistor. Adjacent to the gate insulator 27 are sequentially arranged an amorphous silicon channel film (active semiconductor film) 33, signal lines (source/drain interconnections) 34, and a silicon nitride interlayer dielectric film (protecting film) 30. A liquid crystal panel of this type is generally called as a bottom gate type panel.
The amorphous silicon channel film 33 includes a doped layer (n layer) doped with phosphorus (P), and an intrinsic layer (i layer, also called as an undoped layer). On the gate insulator 27 is a pixel region, in which the transparent picture electrode 5 is arranged. The transparent picture electrode 5 is made from, for example, an ITO film containing In2O3 and SnO. A drain electrode 29 of the thin-film transistor is in contact with and electrically connected to the transparent picture electrode 5 with the interposition of an after-mentioned barrier metal layer.
When a gate voltage is fed to the gate electrode 26 through the scanning line 25, the thin-film transistor 4 is turned on. In this state, a drive voltage which has been fed to the signal line 34 is fed from the source electrode 28 through the drain electrode 29 to the transparent picture electrode 5. When the transparent picture electrode 5 is fed with the drive voltage at a predetermined level, a potential difference occurs between the transparent picture electrode 5 and the counter electrode 2, as described above with reference to FIG. 1. This potential difference orients or aligns the liquid crystal molecules in the liquid crystal layer 3, thereby bringing about light modulation.
In the thin-film transistor substrate 1, the source/drain interconnections 34 electrically connected to the source/drain electrodes; signal lines electrically connected to the transparent picture electrode 5 (signal lines for picture electrode); and scanning lines 25 electrically connected to the gate electrode 26 are each made from a thin film of pure alloy or an aluminum alloy such as Al—Nd (hereinafter pure aluminum and such aluminum alloys are generically referred to as “aluminum alloys”). This is because such pure aluminum or aluminum alloys have a low resistivity and can be easily processed. Barrier metal layers 51, 52, 53, and 54 containing a refractory metal such as Mo, Cr, Ti, or W are arranged on and/or below these interconnections, as illustrated in FIG. 2. A representative example of such an interconnection is a multilayer (three-layer) interconnection including a molybdenum (Mo) layer (lower barrier metal layer) about 50 nm thick, a pure aluminum or Al—Nd alloy thin film about 150 nm thick, and a Mo layer (upper barrier metal layer) about 50 nm thick arranged in this order.
Reasons why the three-layered multilayer interconnection is used as the source/drain interconnections 34 connected to the channel amorphous silicon thin film 33 will be described below.
As is illustrated in FIG. 2, the lower barrier metal layer 53 is arranged between the channel amorphous silicon thin film 33 and the aluminum alloy thin film. This configuration is mainly intended to prevent the interdiffusion between silicon and aluminum at the interface between the aluminum alloy thin film and the channel amorphous silicon thin film (hereinafter also simply referred to as “interface”).
If an aluminum alloy is brought into direct contact with a channel amorphous silicon thin film, and a heat treatment such as sintering or annealing is conducted in a subsequent step in the production of thin-film transistors, aluminum in the aluminum alloy diffuses into the amorphous silicon and/or silicon in the amorphous silicon diffuses into the aluminum alloy. Consequently, the performance of the amorphous silicon as a semiconductor significantly deteriorates, resulting in a decreased ON-state current, an increased leak current flowing when the thin-film transistor is turned off (OFF-state current), and/or a decreased switching speed of the thin-film transistor. Thus, desired thin-film transistor properties cannot be obtained, and the resulting display device has poor performance and quality. The lower barrier metal layer 53 effectively prevents the interdiffusion between aluminum and silicon.
The upper barrier metal layer 54 is arranged on or above the aluminum alloy thin film mainly to prevent the formation of hillocks (nodular projections) on the surface of the aluminum alloy thin film and to ensure a contact with an ITO layer to be arranged thereon. The hillock is probably formed as a result of heat treatment generally at about 300° C. to about 400° C. This heat treatment is carried out in the deposition of a silicon nitride film (protecting film) after the deposition of the aluminum alloy thin film in manufacturing processes of the thin-film transistor substrate. Specifically, the substrate bearing the aluminum alloy thin film is subjected typically to chemical vapor deposition (CVD) to thereby deposit a silicon nitride film (protecting film). The hillocks are probably caused by a difference in thermal expansion between the aluminum alloy thin film and the glass substrate in this process. The upper barrier metal layer 54 effectively prevents the formation of hillocks.
The formation of upper and lower barrier metal layers, however, requires an extra film-deposition system for the deposition thereof, in addition to a film-deposition system for the deposition of aluminum alloy interconnections. Specifically, a film-deposition system including extra film-deposition chambers for the deposition of respective barrier metal thin films must be used. A representative example of the system is a cluster tool system including multiple film-deposition chambers connected to a transfer chamber. The system including extra units for the deposition of barrier metal layers causes an increased production cost and a reduced productivity, which must be avoided in mass-production of liquid crystal panels at low cost.
The aluminum alloy thin film is connected to the transparent picture electrode 5 with the interposition of the barrier metal layer 51 as illustrated in FIG. 2. If an aluminum alloy thin film is directly connected to the transparent picture electrode, the contact resistance between these components is high, which impairs the quality of displayed images. Aluminum used as a material for the interconnections for the transparent picture electrode is very susceptible to oxidation. Consequently, an insulating layer of an aluminum oxide is formed at the interface between the aluminum alloy thin film and the transparent picture electrode. The aluminum oxide is caused by oxygen formed or added during film-deposition processes of the liquid crystal panel. The indium tin oxide (ITO) as a material for the transparent picture electrode is an electrically conductive metal oxide, but it fails to establish an electrically ohmic contact if an aluminum oxide layer is formed as mentioned above.
The deposition of such barrier metal layers, however, requires extra film-deposition chambers for the deposition thereof, in addition to sputtering systems for the deposition of the gate electrode, source electrode, and drain electrode. These extra units cause an increased production cost and a decreased productivity.
In addition, metals used as the barrier metal layers are processed in processing such as wet etching with a chemical solution at different rates from those of pure aluminum and aluminum alloys. Thus, processing dimensions in transverse or crosswise direction in the processing cannot be significantly controlled. Accordingly, the deposition of barrier metal layers requires complicated processes and thereby causes an increased production cost and a decreased productivity, not only from the viewpoint of film-deposition but also from the viewpoint of processing.
Accordingly, proposals on materials for electrodes that eliminate the necessity for barrier metal layers and enable direct contact between source/drain electrodes and a transparent picture electrode and on materials for electrodes that enable direct contact between source/drain electrodes and semiconductor layers such as a channel amorphous silicon thin film have been made.
Japanese Unexamined Patent Application Publication (JP-A) No. Hei 11-337976 discloses a technique of using an indium zinc oxide (IZO) film containing indium oxide and about 10 percent by mass of zinc oxide as the material for the transparent picture electrode. According to this technique, however, the ITO film that is most widely used must be replaced with the IZO film, which causes an increased material cost.
JP-A No. Hei 11-283934 discloses a method of modifying the surface of a drain electrode by subjecting the drain electrode to plasma treatment or ion implantation. The method, however, requires an extra step for the surface treatment, which causes a decreased productivity.
JP-A No. Hei 11-284195 discloses a method of constructing the gate electrode, source electrode, and drain electrode from a first layer of pure aluminum or an aluminum alloy, and a second layer of pure aluminum or an aluminum alloy further containing impurities such as nitrogen, oxygen, silicon, and carbon. This method is advantageous in that thin films for constituting the gate electrode, source electrode, and drain electrode can be continuously deposited in one film-deposition chamber. This method, however, requires an extra step of depositing the second layer containing impurities. In addition, the resulting source/drain interconnections frequently delaminate from the wall of the chamber in the step of introducing impurities into the source/drain interconnections. This is caused by a difference in thermal expansion coefficient between a film containing the impurities and a film not containing the impurities. To avoid this problem, the method requires frequent maintenance operations while stopping the film-deposition step, and this results in a significantly decreased productivity.
Under these circumstances, the present inventors have disclosed a method that eliminates the necessity of barrier metal layers, simplifies the manufacturing process without increasing the number of steps, and enables direct and reliable contact between the aluminum alloy film and the transparent picture electrode in JP-A No. 2004-214606. The technique disclosed in JP-A No. 2004-214606 uses an aluminum alloy containing 0.1 to 6 atomic percent of at least one selected from the group consisting of Au, Ag, Zn, Cu, nickel, Sr, Ge, Sm, and Bi as an alloy element, and allowing at least part of these alloy elements to be a precipitated or enriched layer at the interface between the aluminum alloy film and the transparent picture electrode to thereby achieve the object.
JP-A No. 2003-273109 discloses a thin film for the three-layered aluminum alloy interconnection, which includes an electrically conductive upper aluminum nitride layer (AlN layer), an aluminum alloy thin film, and an electrically conductive lower aluminum nitride layer arranged in this order. The upper aluminum nitride layer can be directly connected to the ITO film and realizes a satisfactorily low contact resistance. The lower aluminum nitride layer can be directly connected to semiconductor layers such as an amorphous silicon layer and establishes an excellent Ohmic contact. This method, however, requires a highly sophisticated control in sputtering, because sputtering must be conducted while appropriately controlling the composition and proportion of reaction gases in order to deposit the aluminum nitride layers. In addition, the method is still susceptible to improvements in contact resistance and Ohmic contact, and a demand has been made on further improvements.
The above explanation has been made by taking a liquid crystal display device as a representative example, but the problems in the conventional techniques are in common in amorphous silicon thin-film transistor substrates used not only in liquid crystal display devices but also in other devices. These problems also occur in thin-film transistor substrates using a polycrystalline silicon instead of an amorphous silicon as the semiconductor layer of thin-film transistors.